In this paper an Improved Zero Voltage Zero Current Pulse Width Modulation Forward converter which employs a simple resonance snubber circuit is introduced. A simple snubber circuit consists of a capacitor, an inductor and two diodes. In proposed converter, switch Q1 operates at ZCS turnon, and ZVS turnoff conditions and allpassive semiconductor devices operate at ZVZCS turnon and turnoff state. The proposed converter is analyzed and various operating modes of the ZVZCSPWM forward converter are discussed. Analysis and design considerations are presented and the prototype experimental results of a 100w (40 V/2.5A) proposed converter operating at 30 KHz switching frequency confirm the validity of theoretical analysis.
1. Introduction
Pulse width modulated (PWM) forward converter is used in industry in a wide variety of applications. This converter is required to operate with high switching frequencies due to demands for small converter size and high power density. High switching frequency operation, however, results in higher switching losses, increased electromagnetic interference (EMI), and reduced converter efficiency. Numerous softswitching techniques have been proposed to correct these problems
[1

17]
. Almost all these techniques achieve soft switching condition in the main switch using an active auxiliary circuit. Some of these active auxiliary circuits are resonant tanks are added to the conventional converters. Quasiresonant converters are a type family of these converters, that introduced in reduce the switching losses in PWM converters operating at high switching frequency. In these converters, resonances occur in the switch current or in the voltage across the switch
[1

7]
. In Quasiresonant converter, switching losses are significantly reduced, but in these types of converters, voltage and current stresses occur.
In
[8

10]
proposed converter designed to limit the voltage stresses of switches, and the switches can be turned on at the zerovoltage switching (ZVS) during the transition interval.
However, the reverse recovery problem of the rectifier diode will result in the serious spike voltage across the diode.
For improving these problems, various forms of softswitching techniques for forward converter have been proposed
[11

13]
.
They have been removing the conventional reset winding in switching transformer and achieving soft switching. In
[11]
, converter must operate at frequency modulation and output filter is not optimum.
In
[12]
an auxiliary transformer is used to achieve softswitching, and It results in difficultly and complexly designing. In order to improving these problems in converters, zerovoltage transition (ZVT) and zerocurrent transition (ZCT) converters are developed
[13

16]
. ZVT and ZCT converters have the advantages of resonant and quasiresonant converters like low EMI, and the resonances are limited with switching instances, and therefore the converter operates like a regular PWM converter, but in these converters, an auxiliary circuit containing resonant elements and auxiliary switches are used, and need complexity control system.
The aim of this paper is to introduce a simple snubber cell for dc/dc PWM forward converters. The circuits scheme of the new zero voltage and zero current switching pulse width modulation forward converter is shown in
Fig. 1
. The ZVZCS technique in this paper is provided by a snubber cell. The snubber cell consists of a resonant inductor
Lr
, a resonant capacitor
Cr
and two diodes
Dr
and
D
. The switch
Q
1 in the proposed converter turn on at zero current switching (ZCS), and turn off at zero voltagezero current switching (ZVZCS without any voltage or current spikes on switch and diodes.
Proposed ZVZCSPWM forward converter
To simplify the steadystate analysis of the circuit given in
Fig. 1
during one switching cycle, it is assumed that input and output voltages and output current are constant, and semiconductor devices and resonant circuit are ideal.
The main theoretical waveforms of the proposed forward converter are shown in
Fig. 2
, and the equivalent circuit for each operating interval is shown in
Fig. 3
.
Theoretical waveforms
Equivalent circuit schemes of the operation stages in the proposed converter
The theoretically analyzed of proposed ZVZCS converter is in Section 3. The output characteristics of converter and design guideline are presented in Section 4. In Section 5, analysis and design considerations verify by the prototype experimental results of a 100W (40 V/2.5A) proposed converter operating at 30 KHz switching frequency.
2. Proposed ZVZCS‐PWM Converter
In the classical configuration of forward converter, a major disadvantage of the reset winding is that the transformer leakage inductance discharge spike cannot be put off. The leakage spike causes a high voltage stress across the power switch, and another disadvantage is the hard turn off of power switch. Both of them decrease the efficiency of power forward converter. In this paper a lossless snubber for the single switch forward converter is proposed, as

1. Absorbs the leakage inductance energy.

2. Provides zero current switching for power switch at turning on state.

3. Control switchdv/dtat turning off state, thus Provides zero voltage switching for power switch.

4. Removes the high voltage stress across the power switch at turning off state.

5. Provides the soft switching (ZVS or ZCS) turn on and turn off for all semiconductor devices in forward converter.
3. Operation Principles and Analysis
Seven stages occur within one switching cycle in the steady state operation of the proposed converter. The equivalent circuit schemes of these operation stages are given in
Fig. 3(a)

(g)
, respectively.
Stage 1
[
t
_{0}
,
t
_{1}
:
Fig. 3(a)
]: At the beginning of this stage, the switch Q1 is in the off state. The free wheeling diode D2 is in the on state and conducts the load current
I_{o}
. At earlier moment of
t
=
t
_{0}
, the equations
V_{cr}
= −
V_{s}
and
I_{Lr}
=
I_{Ld}
= 0 are valid.
At
t
=
t
_{0}
, turn on signal is applied to the gate of the main IGBTs Q1 and it turns on under exactly ZCS through leakage inductor
Ld
. In this stage the resonance between
Cr
and
Lr
occurs through diode
Dr
, and resonance capacitor
Cr
begins to discharge on the resonance inductor
Lr
and resonance inductor current
i_{Lr}
(
t
) increases. During this stage, currents of main switch Q1 rises and D2 current falls simultaneously and linearly. Thus, the Eq. (1) can be written for switch current.
The resonant inductor current and resonant capacitor voltage can be written as follow in this interval.
Where
And
At
t
=
t
_{1}
, D1 current reaches to the load current
I_{o}
, and switch current reaches to primary reflected output current
n
I_{o}
that
n
=
n
_{2}
/
n
_{1}
, and D2 current falls to zero and turns off under exactly ZVZCS, and this stage finishes.
The time interval Δ
t
_{1}
of this stage is written as follow.
Stage 2
[ t
_{1}
,
t
_{2 }
:Fig. 3(b)]:
In this stage, load current flows through D1, and the reflected current
nI_{o}
plus magnetic current of transformer flows through switch Q1. At
t
=
t
_{1}
the resonance between
Cr
and
Lr
continues in stage 1. During this stage the resonant voltage
v_{Cr}
(
t
) decreases firstly, then after cross of zero reaches to
V_{s}
and the resonant current
i_{Lr}
(
t
) decreases from its peak, and reaches to zero at
t
=
t
_{2}
, and Dr turns off under ZVZCS, and this state finishes.
The resonance
i_{Lr}
(
t
) and
v_{Cr}
(
t
) can be described, respectively as follow.
The time interval of this stage is given by Eq. (9).
Stage 3
[ t
_{2}
,
t
_{3 }
:Fig. 3(c)]:
This stage is on state of the conventional PWM forward converter and, power transfer process occurs from source to load. During this stage, the primary transformer current
i_{Ld}
(
t
) increases and
i_{Lr}
(
t
) and
v_{Cr}
(
t
) can be written, respectively, as follow.
At
t
=
t
_{3}
, switch Q1 turn off under ZVS condition due to capacitor charge, and diode D turns on under ZVZCS and this stage finishes. The time interval Δ
t
_{3}
of this stage is written in Eq. (12).
Where D is the duty cycle of control signal and
T_{s}
= 1/
f_{s}
is the switching period.
f_{s}
is the switching frequency.
Stage 4 [ t
_{3}
,
t
_{4 }
:Fig. 3(d)]:
At
t
=
t
_{3}
, the switch Q1 turns off under ZVS, and diode D turns on and conducts the reflected load current
nI_{o}
. At
t
=
t
_{4}
resonance capacitor
Cr
discharge on
Ld
and resonance capacitor voltage reaches to zero value, and allowing diode D2 start to conduct.
The resonant
v_{Cr}
(
t
) for this interval is derived as follow.
The time interval of this stage is written as follow.
Stage 5
[
t
_{4}
,
t
_{5}
:
Fig. 3(e)
]: At
t
=
t
_{4}
, the diode D2 begins to conduct and the resonance between leakage inductance
Ld
and capacitor
Cr
begins, and
Cr
charges by
Ld
. During this stage the resonant current
i_{Ld}
(
t
) decreases from its peak value and
v_{Cr}
(
t
) arrives to −
V_{s}
at
t
=
t
_{5}
, and then, diode D turns off. The resonant
i_{Ld}
(
t
) and
v_{Cr}
(
t
) can be described, respectively as follow.
Where
And
At
t
=
t
_{5}
,
v_{Cr}
(
t
) arrives to −
V_{s}
, and diodes Dm turns on under ZVZCS and this stage finishes.
The time interval of this stage is written as follow.
Stage 6
[
t
_{5}
,
t
_{6}
:
Fig. 3(f)
]: At
t
=
t
_{5}
, transformer starts with the beginning of reset through diode Dm. At
t
=
t
_{6}
,
i_{Dm}
(
t
) nulls to zero, and transformer resets completely. The
v_{Cr}
(
t
) = −
V_{s}
, and
i_{Ld}
(
t
) decreases during this interval, and
i_{Ld}
(
t
) can be described as follow.
The time interval of this stage is written a follow.
Stage 7
[
t
_{6}
,
t
_{7}
:
Fig. 3(f)
]: This stage at
t
=
t
_{6}
starts when freewheeling diode D2 current reaches to the load current. At
t
=
t
_{7}
, one switching cycle is completed and another switching cycle begins.
4. Design Procedure
 4.1. DC voltage transfer function
The voltage conversion ratio is derived by equating the average output voltage per cycle. In steady state operation, can be described average output voltage as follow.
From Eqs. (6) and (14) the expression for the conversion ratio can be calculated as follow
Where M is dc conversion ratio,
Q
=
Z_{d}
/
R_{L}
is normalized load and D is duty cycle of switches and
D
= (Δ
t
_{1}
+ Δ
t
_{2}
+ Δ
t
_{3}
) /
T_{s}
.
Fig. 4
shows the voltage conversion ratio
M
=
V_{o}
/
V_{s}
versus the normalized load Q, for different values of duty ratio D, a fixed normalized frequency
f_{s}
/
f_{d}
= 0.15 and n = 1, where
n
=
n
_{2}
/
n
_{1}
is turns ratio of transformer,
f_{s}
is switching frequency and
f_{d}
is resonance frequency.
M Versus Q with different D, and fixed f_{s} / f_{d} = 0.15
The proposed ZVZCS PWM forward converter is designed for the following specifications.
The input data are defined as follows:

 Output power:Po= 100W;

 Output voltage:Vo= 40V;

 Input voltage:Vs= 100V;

 Load resistance:RL= 16Ω ;

 Switching frequency = 30KHz;
 4.2. Design transformer and output filter
Although the lossless snubber cell is present in the PWM forward converter, the transformer turns ratio and output filter can be selected using the traditional hard switching forward converter design method
[18]
as follow:
Where
η
is the efficiency of converter, and we are assumed
η
= 0.9 .
D
_{max}
is maximum value of the duty cycle and
D
_{max}
= 0.5 is selected with reference to
[19]
.
n
=1 is selected. Ferrite E 42/33/20 core is selected as transformer , core and
n
_{1}
=
n
_{2}
=
n
_{3}
= 40 turns.
The filter inductor
L_{f}
and filter
C_{f}
capacitor are designed like a regular PWM forward converter. Voltage output ripple and current output ripple must not exceed 1 and 20 percent respectively.
 4.3 Design the snubber parameters
The snubber capacitor is designed to control
dv
/
dt
of the drain to source voltage of the power switch. When the main switch turns off, it provides an alternative path for the leakage inductance current to reduce switching turning OFF losses and
dv
/
dt
EMI noises.
The snubber inductor
L_{r}
and the snubber capacitor
C_{r}
can be selected using the
Fig. 4
. From
Fig. 4
, the normalized load
Q
= 1.5 for
M
= 0.4 and
D
= 0.4 , is obtained, then
Z_{d}
=
Q.R_{L}
= 24Ω . According to the Eq. (4) and Eq. (5) can be calculated
L_{r}
and
C_{r}
as follow.
In order to minimize the influence of the resonant parameters and to easily achieve ZVS turningOFF for power switch, we are selected
f_{s}
/
f_{r}
= 0.15 . Thus
5. Experimental Results
The complete circuit diagram of the proposed converter is shown in
Fig. 5
.
Complete circuit of the implemented prototype
The control system implemented by two main IC that, they are TL494 and IR2110. The output pulse of the TL494 PWM controller is applied to IR2110. TL494 used for control output voltage, and produces PWM pulse signal. The IR2110 is high voltage, high speed power MOSFET driver with independent high and low side referenced output channels. The output pulse of LO pin is applied to gate of power switch
Q
1 . By this control circuit, at converter nominal duty cycle is applied to the switch.
In
Figs. 6

8
and
9
show the some obtained experimental results of the prototype proposed converter from
Fig. 5
.
voltage and current of switch v_{Q1}(t) =100V / div , i_{Q1}(t) = 3A/ div , V_{GS}(t) =10V / div time :10 μs / div
i_{Lr} (t) = i_{Ld} (t) = 5A/ div , v_{Cr} (t) = 100V / div , V_{GS} (t) = 20V / div , time :10 μs / div
Output voltage V_{o} and output current I_{o } V_{0} = 20V / div , I_{0} = 1A/ div
Efficiency of the proposed converter (continuous line) and hard switching counterpart (broken line) versus output power
Fig.6
is shown voltage and current of the switch
Q
1. In
Fig. 6
, it can be noticed that power switch in proposed converter operates at ZCS and ZVS mode respectively at turning on, and turning off, and it can be noticed that
Q
1 don’t have any voltage and current spikes in switching state.
Fig. 7
, is shown the current of resonant inductor
i_{Lr}
(
t
) , the Leakage inductor current
i_{Ld}
(
t
) and resonant capacitor voltage
v_{Cr}
(
t
) . As
Fig. 7
can be seen the experimental waveforms are closed to theoretical waveform, and confirming the soft switching without voltage and current stresses.
Fig. 8
is shown output voltage
V_{O}
and output current
I_{O}
.
As experimentally results of ZVZCS PWM forward converter, it can be clearly seen that the predicted operation principles and theoretical analysis are verified.
The losses of the converter components used for experimental verification are calculated based on formulas at
[18
,
20]
at full load condition, and are listed in
Table 1
.
Comparison of power losses of the proposed converter and the conventional converters
Comparison of power losses of the proposed converter and the conventional converters
The experimentally efficiency curve of the converter versus output power shows in
Fig.9
. Notice that proposed converter has 92% efficiency in full load, and also has high efficiency in light load.
At proposed converter the conduction losses in the IGBT around 10% is higher than conventional hard switching converter, due to its peak current.
6. Conclusion
In this paper Improved Zero Voltage Zero Current Pulse Width Modulation (ZVZCSPWM) Forward converter which employs a simple snubber circuit that overcomes most of the drawbacks of the normal PWM dcdc forward converter is proposed. The switch Q1 operates at ZCS turnon and ZVS turnoff, and the allpassive semiconductor devices operate at soft switching turnon and turnoff. This new converter has no additional current and voltage spikes and conduction loss in the main switch in comparison to the hardswitching converter counterpart and is suitable for high switching frequency and high power operation. A PWM ZVZCS forward converter with has been analyzed in detail. The predicted operation principles and theoretical analysis of this converter has been exactly verified with experimental results of a 100W and 30KHz IGBTPWM proposed converter. It has been clearly observed that power switch have operated with soft switching.
BIO
Karim Soltanzadeh He received the B.S. and M.S degrees in power engineering from Department of Electrical Engineering of Islamic Azad University Najafabad Branch, Iran in 2010 and 2013, respectively. His current research interests include soft switching techniques in dcdc power converters.
Majid Dehghani He was born in Isfahan, Iran, in 1972. He received B.Sc., M.Sc. and Ph.D. degrees in electrical engineering from Isfahan University of Technology, Isfahan, Iran, in 1994, 1996 and 2009 respectively. Since 2010, he has been with the Department of Electrical Engineering of Islamic Azad University Najafabad Branch, as a faculty member, where he is currently an Assistant professor. His research interests include power electronics, renewable energy, and electric machines.
Hosein Khalilian He received B.S. and M.S. degree in electrical engineering from the Tabriz National University of Islamic republic of Iran in 2004. He has two national patent on switching power supply and a lot of letters in national conferences. His main research interests include power converter analysis, design, working on ZVZCS power supplies and digital control of switching power supplies.
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